1. Field of the Invention
Embodiments of the present invention generally relate to a method for plasma etching chromium and, more specifically, to a method for etching a chromium layer during photomask fabrication.
2. Description of the Related Art
In the manufacture of integrated circuits (IC), or chips, patterns representing different layers of the chip are created by a chip designer. A series of reusable masks, or photomasks, are created from these patterns in order to transfer the design of each chip layer onto a semiconductor substrate during the manufacturing process. Mask pattern generation systems use precision lasers or electron beams to image the design of each layer of the chip onto a respective mask. The masks are then used much like photographic negatives to transfer the circuit patterns for each layer onto a semiconductor substrate. These layers are built up using a sequence of processes and translate into the tiny transistors and electrical circuits that comprise each completed chip. Thus, any defects in the mask may be transferred to the chip, potentially adversely affecting performance. Defects that are severe enough may render the mask completely useless. Typically, a set of 15 to 30 masks is used to construct a chip and can be used repeatedly.
A mask is typically a glass or a quartz substrate that has a layer of chromium on one side. The chromium layer is covered with an anti-reflective coating and a photosensitive resist. During a patterning process, the circuit design is written onto the mask by exposing portions of the resist to ultraviolet light, making the exposed portions soluble in a developing solution. The soluble portion of the resist is then removed to create a pattern. This pattern allows the exposed underlying chromium to be etched. The etch process removes the chromium and anti-reflective layers from the mask at locations where the resist was removed, i.e., the exposed chromium is removed.
Another mask utilized for patterning is known as a quartz phase shift mask. The quartz phase shift mask is similar to the mask described above, except that alternating adjacent areas of quartz regions exposed through the patterned chromium layer are etched to a depth about equal to half the wavelength of light which will be utilized to transfer the circuit patterns to a substrate during fabrication. The chromium layer is removed after quartz etching. Thus, as the light is shown through the quartz phase shift mask to expose resist disposed on the substrate, the light impinging the resist through one opening in the mask is 180 degrees out of phase relative to the light passing through the immediately adjacent opening. Therefore, light that may be scattered at the edges of the mask opening is cancelled out by the 180 degree out of phase, light scattering at the edge of the adjacent opening, causing a tighter distribution of light in a predefined region of the resist. The tighter distribution of light facilitates writing of features having smaller critical dimensions. Similarly, masks used for chromeless etch lithography also utilize the phase shift of light passing through quartz portions of two masks to sequentially image the resist, thereby improving the light distribution utilized to develop the resist pattern. The phase shift of light through the mask may also be realized using a patterned layer of silicon nitride (SiN) doped with molybdenum (Mb) that caused the imaging light passing through the patterned portions of mask to be 180 degrees out of phase to the light passing through the quartz substrate exposed through openings in the patterned layer.
In one etch process, known as dry etching, reactive ion etching, or plasma etching, a plasma is used to enhance a chemical reaction and etch the patterned chromium area of the mask. Undesirably, conventional chromium etch processes often exhibit etch bias due to attack on the photoresist material utilized to pattern the chromium layer. As the resist is attacked during the chromium etch, the critical dimension of patterned resist is not accurately transferred to the chromium layer. Thus, conventional chromium etch processes may not produce acceptable results for masks having critical dimensions less than about 5 μm. This results in non-uniformity of the etched features of the mask and correspondingly diminishes the ability to produce features for devices having small critical dimensions using the mask.
As the critical dimensions of mask continue to shrink, the importance of etch uniformity increases. Thus, a chromium etch process having high etch uniformity is highly desirable.
Thus, there is a need for an improved chromium etch process.